MIcro-NAno electronics & Radio Communications
The research activities of the MINARC team revolve around two main axes: architecture and design of wireless communication systems, including applications in biomedical or connected objects, and optimization of CMOS circuits.
Architecture and design of communications systems
The research carried out by the MINARC team focuses on the convergence of electronics and communications.
One area of potential applications is biomedical. Research projects include:
- Energy-efficient communication protocols for heterogeneous body area networks (partner: Sorin group),
- Multi-electrode cardiac stimulation (partner: Sorin group),
- Self-adaptive front-end for biomedical radios (partner: CEA-LETI),
- Feasibility of UWB and RFID for surveillance of biomedical parameters (partner: EMKA).
The second area of application is wireless communication systems with the aim of developing agile and reconfigurable components and subsystems. Some of our projects include:
- Agile filters for RF and microwave applications (partner: Thales Airborne Systems),
- Energy-efficient MAC protocols for 3GPP LTE (partner: Chinese Academy of Sciences),
- Partial reorganization of ASICs by integrating FPGA (Partner: Adiscys).
Objectives: to reduce the energy consumption of systems using connected objects, in particular by optimizing the power of the radio links
Keywords: Internet of Things, Visible Light Communication, Indoor localization, real time signal processing.
CMOS Circuit Optimization
Low Voltage CMOS
The main objective of this research area is to design CMOS circuits that operate at the lowest possible supply voltage. Our interests cover analog / RF circuits, digital for standard cell libraries and memories implemented in both CMOS and SOI.
Significant contributions from our group in the field of SRAM have resulted in new memory cells in CMOS-SOI using transistors 4, 5 and 8 operating at 0.4V with better noise margins in retention, read and write modes. With respect to the transistor structures.
Devices smaller than 100 nm
Another important research direction of our group is the CMOS design under a large variation of parameters encountered in devices of less than 100 nm.
We focus on circuit innovation and the definition of design constraints that minimizes the impact of lower parameter tolerances. We also study circuits manufactured in new processes such as FDSOI, multi-gate SOI with reduced process variations, as well as circuits using new components such as nanofrequency transistors and molecular electronics.
An important activity of the team is the search for an device going beyond the ubiquitous CMOS transistor such as the tunnel-FET transistor (TFET), impact ionization transistor (IMOS), molecular transistors, transistors MOS in accumulation mode, silicon nanowires and carbon nanotubes. We are focusing on the study and improvement of two lesser known but promising structures: TFET and IMOS, focusing specifically on improving the TFET ION and the reliability of IMOS.
Computer Aided Design (TCAD)
Part of our research focuses on the development of TCAD models for new components.
TCAD tools such as Atlas are used to study the behavior of different implementations of these new devices and to analyze physical processes at work. Based on these peripheral level models, we develop circuit-level models in VHDL and Verilog-AMS to study the feasibility and robustness of circuits designed with these new components.